IST Lunch Bunch
Energy Efficient Design: From Computing To Biomedical Devices
The scalability of CMOS technology has driven computation into a diverse range of applications across the power consumption, performance and size spectra. Communication is a necessary adjunct to computation, and whether in the context of high-performance computing, mobile devices or biomedical implants, chip-to-chip communication can take up a significant portion of the overall system power budget. Today Data Center and High Performance Computing (HPC) performance is increasingly limited by interconnection bandwidth. Maintaining continued aggregate bandwidth growth without overwhelming the power budget for these large scale computing systems and data centers is paramount. The historic power efficiency gains via CMOS technology scaling for such interconnects have rolled off over the past decade, and new low-cost approaches are necessary. In the first part of this talk a number of promising solutions including Silicon-Photonic-based interconnects that can overcome these challenges will be discussed.
At the other extreme of design spectrum, sensors and implantable biomedical devices suffer from similar limitations on power consumption given their small size and operating environment. Current commercial implants are too bulky, mechanically rigid, functionally limited and power thirsty. A tremendous opportunity for breakthroughs lies in the area of miniaturization and development of minimally invasive or injectable implants. Wireless power delivery and power harvesting remove the need for a battery and allow smaller size, but can severely limit the functionality, communication bandwidth and location of the implant. During the second part of this talk, challenges and solutions for realization of future non-invasive wireless implants will be discussed.
Contact: Diane Goodfellow at 626-797-2398 email@example.com